A DRAM Backend for The Impulse Memory System

T h e Im pulse A d ap tab le M e m o ry S ystem exp oses D R A M access patterns not seen in conven tion al m em ory system s. F or instance, it can generate 32 D R A M a ccesses ea ch o f w h ic h requests a fou r-byte w ord in 32 c yc le s . C on ven tion al D R A M b acken d s are o p tim ized for a ccesses that request fu ll cach e lines. T h e y m ay not b e able to handle sm aller a ccesses effectively . In this docum ent, w e describe and evaluate a D R A M b acken d that reduces the average D R A M access laten cy b y exp lo itin g the potential p aralle lism o f D R A M a ccesses in the Im pulse system . W e design the D R A M b acken d b y studying ea ch o f its im portant design options: D R A M organization , hot ro w p o licy , d yn am ic re­ ordering o f D R A M accesses, and in terleavin g o f D R A M banks. T h e experim ental results obtained from the execution-driven sim ulator P ain t [10] sh o w that, com pared to a conven tion al D R A M backend, the proposed b acken d can reduce the average D R A M access la ten cy b y up to 98 % , the average m em ory c y c le s b y up to 90 % , and the execu tio n tim e b y up to 80% . This effort was sponsored in part by the Defense Advanced Research Projects Agency (DARPA) and the Air Force Research Laboratory (AFRL) under agreement number F30602-98-1-0101 and DARPA Order Numbers F393/00-01 and F376/00. The views and conclusions contained herein are those of the authors and should not be interpreted as necessarily representing the official polices or endorsements, either express or implied, of DARPA, AFRL, or the US Government. 1 In tr o d u c t io n 3 2 O v e r v ie w o f T h e Im p u ls e M e m o r y S y s te m 3 2.1 H ardw are O r g a n iz a t io n ......................................................................................................................................... 4 2.2 R em ap p in g A lg o r i t h m s ......................................................................................................................................... 6 3 D R A M B a s ic s 7 3.1 Syn ch ro n ou s D R A M ............................................................................................................................................. 7 3.2 D ire ct R am bus D R A M ......................................................................................................................................... 8